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[VPlan] Simplify live-ins early using SCEV. (#155304)
Use SCEV to simplify all live-ins during VPlan0 construction. This enables us to remove special SCEV queries when constructing VPWidenRecipes and improves results in some cases. This leads to simplifications in a number of cases in real-world applications (~250 files changed across LLVM, SPEC, ffmpeg) PR: #155304
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8 files changed

+48
-83
lines changed

8 files changed

+48
-83
lines changed

‎llvm/lib/Transforms/Vectorize/LoopVectorize.cpp‎

Lines changed: 3 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -7921,32 +7921,9 @@ VPWidenRecipe *VPRecipeBuilder::tryToWiden(VPInstruction *VPI) {
79217921
case Instruction::Shl:
79227922
case Instruction::Sub:
79237923
case Instruction::Xor:
7924-
case Instruction::Freeze: {
7925-
SmallVector<VPValue *> NewOps(VPI->operands());
7926-
if (Instruction::isBinaryOp(VPI->getOpcode())) {
7927-
// The legacy cost model uses SCEV to check if some of the operands are
7928-
// constants. To match the legacy cost model's behavior, use SCEV to try
7929-
// to replace operands with constants.
7930-
ScalarEvolution &SE = *PSE.getSE();
7931-
auto GetConstantViaSCEV = [this, &SE](VPValue *Op) {
7932-
if (!Op->isLiveIn())
7933-
return Op;
7934-
Value *V = Op->getUnderlyingValue();
7935-
if (isa<Constant>(V) || !SE.isSCEVable(V->getType()))
7936-
return Op;
7937-
auto *C = dyn_cast<SCEVConstant>(SE.getSCEV(V));
7938-
if (!C)
7939-
return Op;
7940-
return Plan.getOrAddLiveIn(C->getValue());
7941-
};
7942-
// For Mul, the legacy cost model checks both operands.
7943-
if (VPI->getOpcode() == Instruction::Mul)
7944-
NewOps[0] = GetConstantViaSCEV(NewOps[0]);
7945-
// For other binops, the legacy cost model only checks the second operand.
7946-
NewOps[1] = GetConstantViaSCEV(NewOps[1]);
7947-
}
7948-
return new VPWidenRecipe(*I, NewOps, *VPI, *VPI, VPI->getDebugLoc());
7949-
}
7924+
case Instruction::Freeze:
7925+
return new VPWidenRecipe(*I, VPI->operands(), *VPI, *VPI,
7926+
VPI->getDebugLoc());
79507927
case Instruction::ExtractValue: {
79517928
SmallVector<VPValue *> NewOps(VPI->operands());
79527929
auto *EVI = cast<ExtractValueInst>(I);

‎llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#include "llvm/Analysis/LoopInfo.h"
2121
#include "llvm/Analysis/LoopIterator.h"
2222
#include "llvm/Analysis/ScalarEvolution.h"
23+
#include "llvm/Analysis/ScalarEvolutionExpressions.h"
2324
#include "llvm/IR/InstrTypes.h"
2425
#include "llvm/IR/MDBuilder.h"
2526
#include "llvm/Transforms/Utils/LoopUtils.h"
@@ -566,13 +567,30 @@ static void addInitialSkeleton(VPlan &Plan, Type *InductionTy, DebugLoc IVDL,
566567
}
567568
}
568569

570+
/// Check \p Plan's live-in and replace them with constants, if they can be
571+
/// simplified via SCEV.
572+
static void simplifyLiveInsWithSCEV(VPlan &Plan, ScalarEvolution &SE) {
573+
auto GetSimplifiedLiveInViaSCEV = [&](VPValue *VPV) -> VPValue * {
574+
const SCEV *Expr = vputils::getSCEVExprForVPValue(VPV, SE);
575+
if (auto *C = dyn_cast<SCEVConstant>(Expr))
576+
return Plan.getOrAddLiveIn(C->getValue());
577+
return nullptr;
578+
};
579+
580+
for (VPValue *LiveIn : Plan.getLiveIns()) {
581+
if (VPValue *SimplifiedLiveIn = GetSimplifiedLiveInViaSCEV(LiveIn))
582+
LiveIn->replaceAllUsesWith(SimplifiedLiveIn);
583+
}
584+
}
585+
569586
std::unique_ptr<VPlan>
570587
VPlanTransforms::buildVPlan0(Loop *TheLoop, LoopInfo &LI, Type *InductionTy,
571588
DebugLoc IVDL, PredicatedScalarEvolution &PSE,
572589
LoopVersioning *LVer) {
573590
PlainCFGBuilder Builder(TheLoop, &LI, LVer);
574591
std::unique_ptr<VPlan> VPlan0 = Builder.buildPlainCFG();
575592
addInitialSkeleton(*VPlan0, InductionTy, IVDL, PSE, TheLoop);
593+
simplifyLiveInsWithSCEV(*VPlan0, *PSE.getSE());
576594
return VPlan0;
577595
}
578596

‎llvm/lib/Transforms/Vectorize/VPlanUtils.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,8 @@ bool vputils::isHeaderMask(const VPValue *V, const VPlan &Plan) {
8282
const SCEV *vputils::getSCEVExprForVPValue(const VPValue *V,
8383
ScalarEvolution &SE, const Loop *L) {
8484
if (V->isLiveIn()) {
85-
if (Value *LiveIn = V->getLiveInIRValue())
85+
Value *LiveIn = V->getLiveInIRValue();
86+
if (LiveIn && SE.isSCEVable(LiveIn->getType()))
8687
return SE.getSCEV(LiveIn);
8788
return SE.getCouldNotCompute();
8889
}

‎llvm/test/Transforms/LoopVectorize/iv_outside_user.ll‎

Lines changed: 6 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1067,19 +1067,16 @@ define i32 @test_iv_uniform_with_outside_use_scev_simplification(ptr %dst) {
10671067
; VEC: [[VECTOR_PH]]:
10681068
; VEC-NEXT: br label %[[VECTOR_BODY:.*]]
10691069
; VEC: [[VECTOR_BODY]]:
1070-
; VEC-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
1071-
; VEC-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0
1072-
; VEC-NEXT: [[TMP6:%.*]] = add i32 [[INDEX]], 1
1070+
; VEC-NEXT: [[TMP0:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
10731071
; VEC-NEXT: [[TMP1:%.*]] = getelementptr inbounds i16, ptr [[DST]], i32 [[TMP0]]
10741072
; VEC-NEXT: store <2 x i16> zeroinitializer, ptr [[TMP1]], align 2
1075-
; VEC-NEXT: [[TMP5:%.*]] = add i32 [[STEP_2]], [[TMP6]]
1076-
; VEC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
1073+
; VEC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[TMP0]], 2
10771074
; VEC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[INDEX_NEXT]], 8
10781075
; VEC-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], {{!llvm.loop ![0-9]+}}
10791076
; VEC: [[MIDDLE_BLOCK]]:
10801077
; VEC-NEXT: br label %[[E_EXIT:.*]]
10811078
; VEC: [[E_EXIT]]:
1082-
; VEC-NEXT: ret i32 [[TMP5]]
1079+
; VEC-NEXT: ret i32 8
10831080
;
10841081
; INTERLEAVE-LABEL: define i32 @test_iv_uniform_with_outside_use_scev_simplification(
10851082
; INTERLEAVE-SAME: ptr [[DST:%.*]]) {
@@ -1096,14 +1093,13 @@ define i32 @test_iv_uniform_with_outside_use_scev_simplification(ptr %dst) {
10961093
; INTERLEAVE-NEXT: [[TMP3:%.*]] = getelementptr inbounds i16, ptr [[DST]], i32 [[TMP1]]
10971094
; INTERLEAVE-NEXT: store i16 0, ptr [[TMP2]], align 2
10981095
; INTERLEAVE-NEXT: store i16 0, ptr [[TMP3]], align 2
1099-
; INTERLEAVE-NEXT: [[TMP5:%.*]] = add i32 [[STEP_2]], [[TMP1]]
11001096
; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
11011097
; INTERLEAVE-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 8
11021098
; INTERLEAVE-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], {{!llvm.loop ![0-9]+}}
11031099
; INTERLEAVE: [[MIDDLE_BLOCK]]:
11041100
; INTERLEAVE-NEXT: br label %[[E_EXIT:.*]]
11051101
; INTERLEAVE: [[E_EXIT]]:
1106-
; INTERLEAVE-NEXT: ret i32 [[TMP5]]
1102+
; INTERLEAVE-NEXT: ret i32 8
11071103
;
11081104
entry:
11091105
%step.1 = sext i8 0 to i32
@@ -1131,8 +1127,6 @@ define i32 @test_iv_uniform_with_outside_use_scev_simplification_2(ptr %dst) {
11311127
; VEC-NEXT: [[STEP_2:%.*]] = add nsw i32 [[STEP_1]], 1
11321128
; VEC-NEXT: br label %[[VECTOR_PH:.*]]
11331129
; VEC: [[VECTOR_PH]]:
1134-
; VEC-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <2 x i32> poison, i32 [[STEP_2]], i64 0
1135-
; VEC-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <2 x i32> [[BROADCAST_SPLATINSERT]], <2 x i32> poison, <2 x i32> zeroinitializer
11361130
; VEC-NEXT: br label %[[VECTOR_BODY:.*]]
11371131
; VEC: [[VECTOR_BODY]]:
11381132
; VEC-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
@@ -1145,7 +1139,7 @@ define i32 @test_iv_uniform_with_outside_use_scev_simplification_2(ptr %dst) {
11451139
; VEC-NEXT: store i16 0, ptr [[TMP2]], align 2
11461140
; VEC-NEXT: store i16 0, ptr [[TMP3]], align 2
11471141
; VEC-NEXT: [[TMP4:%.*]] = add <2 x i32> [[VEC_IND]], splat (i32 1)
1148-
; VEC-NEXT: [[TMP5:%.*]] = add <2 x i32> [[BROADCAST_SPLAT]], [[TMP4]]
1142+
; VEC-NEXT: [[TMP5:%.*]] = add <2 x i32> splat (i32 1), [[TMP4]]
11491143
; VEC-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
11501144
; VEC-NEXT: [[VEC_IND_NEXT]] = add <2 x i32> [[VEC_IND]], splat (i32 4)
11511145
; VEC-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4
@@ -1173,7 +1167,7 @@ define i32 @test_iv_uniform_with_outside_use_scev_simplification_2(ptr %dst) {
11731167
; INTERLEAVE-NEXT: store i16 0, ptr [[TMP2]], align 2
11741168
; INTERLEAVE-NEXT: store i16 0, ptr [[TMP3]], align 2
11751169
; INTERLEAVE-NEXT: [[TMP4:%.*]] = add i32 [[TMP1]], 1
1176-
; INTERLEAVE-NEXT: [[TMP5:%.*]] = add i32 [[STEP_2]], [[TMP4]]
1170+
; INTERLEAVE-NEXT: [[TMP5:%.*]] = add i32 1, [[TMP4]]
11771171
; INTERLEAVE-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
11781172
; INTERLEAVE-NEXT: [[TMP6:%.*]] = icmp eq i32 [[INDEX_NEXT]], 4
11791173
; INTERLEAVE-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], {{!llvm.loop ![0-9]+}}

‎llvm/test/Transforms/LoopVectorize/lcssa-crashes.ll‎

Lines changed: 14 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -89,46 +89,38 @@ define void @test3(ptr %p) {
8989
; CHECK: vector.ph:
9090
; CHECK-NEXT: br label [[VECTOR_BODY1:%.*]]
9191
; CHECK: vector.body:
92-
; CHECK-NEXT: [[POS_337:%.*]] = add i32 [[ADD41]], 0
93-
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[ADD41]], 1
94-
; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[ADD41]], 2
95-
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[ADD41]], 3
96-
; CHECK-NEXT: [[INC46:%.*]] = add i32 [[POS_337]], 1
97-
; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP1]], 1
98-
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP2]], 1
99-
; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 1
92+
; CHECK-NEXT: [[INC46:%.*]] = add i32 6, 1
93+
; CHECK-NEXT: [[TMP5:%.*]] = add i32 7, 1
94+
; CHECK-NEXT: [[TMP6:%.*]] = add i32 8, 1
95+
; CHECK-NEXT: [[TMP7:%.*]] = add i32 9, 1
10096
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[INC46]], i32 0
10197
; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP5]], i32 1
10298
; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[TMP6]], i32 2
10399
; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[TMP7]], i32 3
104100
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF:%.*]], label [[PRED_STORE_CONTINUE:%.*]]
105101
; CHECK: pred.store.if:
106-
; CHECK-NEXT: [[IDXPROM4738:%.*]] = add i64 [[IDXPROM4736]], 0
107-
; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P:%.*]], i64 0, i64 [[IDXPROM4738]]
102+
; CHECK-NEXT: [[ARRAYIDX48:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P:%.*]], i64 0, i64 6
108103
; CHECK-NEXT: store i8 0, ptr [[ARRAYIDX48]], align 1
109104
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE]]
110105
; CHECK: pred.store.continue:
111106
; CHECK-NEXT: br i1 true, label [[PRED_STORE_IF2:%.*]], label [[PRED_STORE_CONTINUE3:%.*]]
112-
; CHECK: pred.store.if2:
113-
; CHECK-NEXT: [[TMP14:%.*]] = add i64 [[IDXPROM4736]], 1
114-
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP14]]
107+
; CHECK: pred.store.if1:
108+
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 7
115109
; CHECK-NEXT: store i8 0, ptr [[TMP15]], align 1
116110
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE3]]
117-
; CHECK: pred.store.continue3:
111+
; CHECK: pred.store.continue2:
118112
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF4:%.*]], label [[PRED_STORE_CONTINUE5:%.*]]
119-
; CHECK: pred.store.if4:
120-
; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[IDXPROM4736]], 2
121-
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP16]]
113+
; CHECK: pred.store.if3:
114+
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 8
122115
; CHECK-NEXT: store i8 0, ptr [[TMP17]], align 1
123116
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE5]]
124-
; CHECK: pred.store.continue5:
117+
; CHECK: pred.store.continue4:
125118
; CHECK-NEXT: br i1 false, label [[PRED_STORE_IF6:%.*]], label [[PRED_STORE_CONTINUE7:%.*]]
126-
; CHECK: pred.store.if6:
127-
; CHECK-NEXT: [[TMP18:%.*]] = add i64 [[IDXPROM4736]], 3
128-
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 [[TMP18]]
119+
; CHECK: pred.store.if5:
120+
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [1024 x i8], ptr [[P]], i64 0, i64 9
129121
; CHECK-NEXT: store i8 0, ptr [[TMP19]], align 1
130122
; CHECK-NEXT: br label [[PRED_STORE_CONTINUE7]]
131-
; CHECK: pred.store.continue7:
123+
; CHECK: pred.store.continue6:
132124
; CHECK-NEXT: br label [[MIDDLE_BLOCK:%.*]]
133125
; CHECK: middle.block:
134126
; CHECK-NEXT: [[FIRST_INACTIVE_LANE:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> <i1 false, i1 false, i1 true, i1 true>, i1 false)

‎llvm/test/Transforms/LoopVectorize/pr58811-scev-expansion.ll‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -504,11 +504,10 @@ define void @iv_start_from_shl_of_previous_iv(ptr %dst) {
504504
; VF2-NEXT: [[IV_1_SHL:%.*]] = shl i64 1, 1
505505
; VF2-NEXT: br label %[[VECTOR_PH1:.*]]
506506
; VF2: [[VECTOR_PH1]]:
507-
; VF2-NEXT: [[TMP0:%.*]] = add i64 [[IV_1_SHL]], 98
508507
; VF2-NEXT: br label %[[VECTOR_BODY2:.*]]
509508
; VF2: [[VECTOR_BODY2]]:
510509
; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH1]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY2]] ]
511-
; VF2-NEXT: [[OFFSET_IDX:%.*]] = add i64 [[IV_1_SHL]], [[INDEX]]
510+
; VF2-NEXT: [[OFFSET_IDX:%.*]] = add i64 2, [[INDEX]]
512511
; VF2-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[DST]], i64 [[OFFSET_IDX]]
513512
; VF2-NEXT: store <2 x i8> splat (i8 1), ptr [[TMP1]], align 1
514513
; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
@@ -519,7 +518,7 @@ define void @iv_start_from_shl_of_previous_iv(ptr %dst) {
519518
; VF2: [[SCALAR_PH]]:
520519
; VF2-NEXT: br label %[[LOOP_2:.*]]
521520
; VF2: [[LOOP_2]]:
522-
; VF2-NEXT: [[IV_2:%.*]] = phi i64 [ [[TMP0]], %[[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_2]] ]
521+
; VF2-NEXT: [[IV_2:%.*]] = phi i64 [ 100, %[[SCALAR_PH]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_2]] ]
523522
; VF2-NEXT: [[GEP_2:%.*]] = getelementptr i8, ptr [[DST]], i64 [[IV_2]]
524523
; VF2-NEXT: store i8 1, ptr [[GEP_2]], align 1
525524
; VF2-NEXT: [[IV_2_NEXT]] = add i64 [[IV_2]], 1

‎llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ define void @reuse_lcssa_phi_for_add_rec1(ptr %head) {
1313
; CHECK-NEXT: [[IV_2:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[IV_2_NEXT:%.*]], %[[LOOP_1]] ]
1414
; CHECK-NEXT: [[FOR:%.*]] = phi ptr [ [[HEAD]], %[[ENTRY]] ], [ [[L_1:%.*]], %[[LOOP_1]] ]
1515
; CHECK-NEXT: [[L_1]] = load ptr, ptr [[FOR]], align 8
16-
; CHECK-NEXT: [[IV_2_NEXT]] = add nuw nsw i32 [[IV_2]], 1
16+
; CHECK-NEXT: [[IV_2_NEXT]] = add nuw i32 [[IV_2]], 1
1717
; CHECK-NEXT: [[EC_1:%.*]] = icmp eq ptr [[L_1]], null
1818
; CHECK-NEXT: [[IV_NEXT]] = add nuw i64 [[IV]], 1
1919
; CHECK-NEXT: br i1 [[EC_1]], label %[[PH:.*]], label %[[LOOP_1]]

‎llvm/test/Transforms/LoopVectorize/scalable-iv-outside-user.ll‎

Lines changed: 2 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -13,38 +13,22 @@ define i32 @iv_live_out_wide(ptr %dst) {
1313
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
1414
; CHECK: [[VECTOR_PH]]:
1515
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.vscale.i32()
16-
; CHECK-NEXT: [[TMP5:%.*]] = mul nuw i32 [[TMP4]], 2
17-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[TMP5]], i64 0
18-
; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT1]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
19-
; CHECK-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP5]], 2
16+
; CHECK-NEXT: [[TMP6:%.*]] = mul nuw i32 [[TMP4]], 4
2017
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 2000, [[TMP6]]
2118
; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 2000, [[N_MOD_VF]]
22-
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <vscale x 2 x i32> poison, i32 [[STEP_2]], i64 0
23-
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <vscale x 2 x i32> [[BROADCAST_SPLATINSERT]], <vscale x 2 x i32> poison, <vscale x 2 x i32> zeroinitializer
24-
; CHECK-NEXT: [[TMP7:%.*]] = call <vscale x 2 x i32> @llvm.stepvector.nxv2i32()
25-
; CHECK-NEXT: [[TMP8:%.*]] = mul <vscale x 2 x i32> [[TMP7]], splat (i32 1)
26-
; CHECK-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i32> zeroinitializer, [[TMP8]]
2719
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
2820
; CHECK: [[VECTOR_BODY]]:
2921
; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
30-
; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i32> [ [[INDUCTION]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[VECTOR_BODY]] ]
31-
; CHECK-NEXT: [[STEP_ADD:%.*]] = add <vscale x 2 x i32> [[VEC_IND]], [[BROADCAST_SPLAT2]]
3222
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i16, ptr [[DST]], i32 [[INDEX]]
3323
; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.vscale.i64()
3424
; CHECK-NEXT: [[TMP13:%.*]] = shl nuw i64 [[TMP12]], 1
3525
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i16, ptr [[TMP10]], i64 [[TMP13]]
3626
; CHECK-NEXT: store <vscale x 2 x i16> zeroinitializer, ptr [[TMP10]], align 2
3727
; CHECK-NEXT: store <vscale x 2 x i16> zeroinitializer, ptr [[TMP14]], align 2
38-
; CHECK-NEXT: [[TMP15:%.*]] = add <vscale x 2 x i32> [[BROADCAST_SPLAT]], [[STEP_ADD]]
3928
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], [[TMP6]]
40-
; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i32> [[STEP_ADD]], [[BROADCAST_SPLAT2]]
4129
; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
4230
; CHECK-NEXT: br i1 [[TMP16]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
4331
; CHECK: [[MIDDLE_BLOCK]]:
44-
; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.vscale.i32()
45-
; CHECK-NEXT: [[TMP18:%.*]] = mul nuw i32 [[TMP17]], 2
46-
; CHECK-NEXT: [[TMP19:%.*]] = sub i32 [[TMP18]], 1
47-
; CHECK-NEXT: [[TMP20:%.*]] = extractelement <vscale x 2 x i32> [[TMP15]], i32 [[TMP19]]
4832
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 2000, [[N_VEC]]
4933
; CHECK-NEXT: br i1 [[CMP_N]], label %[[E_EXIT:.*]], label %[[SCALAR_PH]]
5034
; CHECK: [[SCALAR_PH]]:
@@ -58,7 +42,7 @@ define i32 @iv_live_out_wide(ptr %dst) {
5842
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i32 [[IV_NEXT]], 2000
5943
; CHECK-NEXT: br i1 [[CMP_I]], label %[[LOOP]], label %[[E_EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
6044
; CHECK: [[E_EXIT]]:
61-
; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[IV_NEXT]], %[[LOOP]] ], [ [[TMP20]], %[[MIDDLE_BLOCK]] ]
45+
; CHECK-NEXT: [[RES:%.*]] = phi i32 [ [[IV_NEXT]], %[[LOOP]] ], [ [[N_VEC]], %[[MIDDLE_BLOCK]] ]
6246
; CHECK-NEXT: ret i32 [[RES]]
6347
;
6448
entry:

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