[RISCV][LV] EVL vectorization doesn't force safe divisor for srem/sdiv when diving by a loop invariant scalar.

[topperc]

When using EVL vectorization, the vectorizer does not force a safe divisor for srem/sdiv for elements past VL when dividing by a loop invariant scalar.

If the loop invariant scalar is -1 at runtime, this divides poison by -1 which would overflow if the poison elemnet is INT_MIN at runtime. RISC-V doesn't trap for overflow, but this is UB according to IR semantics.

https://godbolt.org/z/1zrGxodMM

CC: @preames @lukel97 @fhahn @arcbbb @ElvisWang123

[llvmbot]

@llvm/issue-subscribers-backend-risc-v

Author: Craig Topper (topperc)

When using EVL vectorization, the vectorizer does not force a safe divisor for srem/sdiv for elements past VL when dividing by a loop invariant scalar.

If the loop invariant scalar is -1 at runtime, this divides poison by -1 which would overflow if the poison elemnet is INT_MIN at runtime. RISC-V doesn't trap for overflow, but this is UB according to IR semantics.

https://godbolt.org/z/1zrGxodMM

CC: @preames @lukel97 @fhahn @arcbbb @ElvisWang123

[arcbbb]

Currently we generate a select to guard unsafe divisor.

  case Instruction::SDiv:
  case Instruction::UDiv:
  case Instruction::SRem:
  case Instruction::URem: {
    // If not provably safe, use a select to form a safe divisor before widening the
    // div/rem operation itself.  Otherwise fall through to general handling below.
    if (CM.isPredicatedInst(I)) {
      SmallVector<VPValue *> Ops(VPI->operands());
      VPValue *Mask = getBlockInMask(Builder.getInsertBlock());
      VPValue *One = Plan.getConstantInt(I->getType(), 1u);
      auto *SafeRHS =
          Builder.createSelect(Mask, Ops[1], One, VPI->getDebugLoc());
      Ops[1] = SafeRHS;
      return new VPWidenRecipe(*I, Ops, *VPI, *VPI, VPI->getDebugLoc());
    }
    [[fallthrough]];
  }

Since the dividend can be poison in tail-folded loop, we should also guard it as well.

[topperc]

Currently we generate a select to guard unsafe divisor.

  case Instruction::SDiv:
  case Instruction::UDiv:
  case Instruction::SRem:
  case Instruction::URem: {
    // If not provably safe, use a select to form a safe divisor before widening the
    // div/rem operation itself.  Otherwise fall through to general handling below.
    if (CM.isPredicatedInst(I)) {
      SmallVector<VPValue *> Ops(VPI->operands());
      VPValue *Mask = getBlockInMask(Builder.getInsertBlock());
      VPValue *One = Plan.getConstantInt(I->getType(), 1u);
      auto *SafeRHS =
          Builder.createSelect(Mask, Ops[1], One, VPI->getDebugLoc());
      Ops[1] = SafeRHS;
      return new VPWidenRecipe(*I, Ops, *VPI, *VPI, VPI->getDebugLoc());
    }
    [[fallthrough]];
  }

Since the dividend can be poison in tail-folded loop, we should also guard it as well.

Note, I think the issue I highlighted only applies to sdiv/srem. udiv/urem only have UB for divide by 0.

[lukel97]

I think #154076 would fix this

[arcbbb]

I think #154076 would fix this

Note that LoopVectorizationCostModel::isPredicatedInst just pass if the divisor is loop invariant.

  case Instruction::UDiv:
  case Instruction::SDiv:
  case Instruction::SRem:
  case Instruction::URem:
    // If the divisor is loop-invariant no predication is needed.
    return !Legal->isInvariant(I->getOperand(1));

We need an additional tail‑folding check: if (dividend == INT_MIN && divisor == -1) is possible, generate a select to guard the sdiv/srem.
Optimizing the div/rem on select with vp intrinsic is nice to have.