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| 1 | +{ |
| 2 | + "sha1": "p8ruzr9kai518ouige50new36s79y3c", |
| 3 | + "insertion": { |
| 4 | + "when": "2025-11-24T19:24:25.501Z", |
| 5 | + "url": "https://github.com/plantuml/plantuml/issues/2418", |
| 6 | + |
| 7 | + } |
| 8 | +} |
| 9 | +@startuml |
| 10 | +scale 1800 width |
| 11 | +[*] --> Device_0_Function_2 |
| 12 | +Device_0_Function_2: 0x10h MemoryBar |
| 13 | +Device_0_Function_2 --> SharedMemory |
| 14 | +state PowerBase { |
| 15 | +state Telemetry_Data_PowerBase { |
| 16 | +Status_A: STATUS_<IP> [31:0] |
| 17 | +Status_B: STATUS_<IP>[31:0] |
| 18 | +} |
| 19 | +} |
| 20 | +state SharedMemory { |
| 21 | +HEADER: 0x00h FW_VERSION_0 |
| 22 | +HEADER: 0x04h FW_VERSION_1 |
| 23 | +HEADER: 0x08h FW_VERSION_2 |
| 24 | +HEADER: 0x0Ch FW_VERSION_3 |
| 25 | +HEADER: 0x10h |
| 26 | +HEADER: 0x14h PowerBase |
| 27 | +HEADER: 0x18h PowerBase_HIGH |
| 28 | +HEADER: 0x1Ch 0x200h (Config Pointer) |
| 29 | +HEADER: ... |
| 30 | +HEADER: 0x70h 0xABCDh(System Memory DEVID) |
| 31 | +HEADER: ... |
| 32 | +HEADER: 0x200h Config1 |
| 33 | +HEADER: 0x220h Config2 |
| 34 | +state Virtual_Config { |
| 35 | +Config1: CAP ID = 0x30 |
| 36 | +Config1: CAP VER = 1 |
| 37 | +Config1: NEXT CAP OFFSET = 0x220h |
| 38 | +Config1: Vendor_ID = 0x1234 |
| 39 | +Config1: Config_VER = 1 |
| 40 | +Config2: Config_LEN = 0x10 |
| 41 | +Config2: Config_ID = 0x2 |
| 42 | +Config2: NumEntries = 0x2 |
| 43 | +Config2: EntrySize = 0x4 |
| 44 | +Config2: BAR_INDEX = 0 |
| 45 | +Config1: OFFSET = 0x4000h |
| 46 | +Config1 --> Config2 |
| 47 | +Config2: CAP ID = 0x30 |
| 48 | +Config2: CAP VER = 1 |
| 49 | +Config2: NEXT CAP OFFSET = 0x000h |
| 50 | +Config2: Vendor_ID = 0x1234 |
| 51 | +Config2: Config_VER = 1 |
| 52 | +Config2: Config_LEN = 0x10 |
| 53 | +Config2: Config_ID = 0x2 |
| 54 | +Config2: NumEntries = 0x8 |
| 55 | +Config2: EntrySize = 0x4 |
| 56 | +Config2: tBIR = 0 |
| 57 | +Config2: OFFSET = 0x4100h |
| 58 | +} |
| 59 | +state Data_Space { |
| 60 | +state Data_Discovery_Table_Memory{ |
| 61 | +Entry0: ACCESS_TYPE = 0x2 |
| 62 | +Entry0: Entry_TYPE = 0x0 |
| 63 | +Entry0: SIZE (in Dwords) = 0x20h |
| 64 | +Entry0: UNIQUE_ID = 0x11111111h |
| 65 | +Entry0: BAR_INDEX = 0 |
| 66 | +Entry0: BASE_OFFSET = 0x00h |
| 67 | +Entry0: Entry_Definition = RESERVED |
| 68 | +Entry1: ACCESS_TYPE = 0x2 |
| 69 | +Entry1: Entry_TYPE = 0x0 |
| 70 | +Entry1: SIZE (in Dwords) = 0x60h |
| 71 | +Entry1: UNIQUE_ID = 0x22222222h |
| 72 | +Entry1: BAR_INDEX = 0 |
| 73 | +Entry1: BASE_OFFSET = 0x1000h |
| 74 | +Entry1: Entry_Definition = RESERVED |
| 75 | +} |
| 76 | +state Data_Discovery_Table_PowerBase{ |
| 77 | +Entry10: ACCESS_TYPE = 0x2 |
| 78 | +Entry10: Entry_TYPE = 0x0 |
| 79 | +Entry10: SIZE (in Dwords) = 0x30h |
| 80 | +Entry10: UNIQUE_ID = 0xBBBBBBBBh |
| 81 | +Entry10: BAR_INDEX = 1 |
| 82 | +Entry10: BASE_OFFSET = 0x4000h |
| 83 | +Entry10: Entry_Definition = RESERVED |
| 84 | +Entry11: ACCESS_TYPE = 0x2 |
| 85 | +Entry11: Entry_TYPE = 0x0 |
| 86 | +Entry11: SIZE (in Dwords) = 0x10h |
| 87 | +Entry11: UNIQUE_ID = 0xCCCCCCCCh |
| 88 | +Entry11: BAR_INDEX = 1 |
| 89 | +Entry11: BASE_OFFSET = 0x5000h |
| 90 | +Entry11: Entry_Definition = RESERVED |
| 91 | +} |
| 92 | +state LPM_Data_Region { |
| 93 | +Power_Mgmt_A: BLK/BRK_TO_BDF MAPPING TABLE |
| 94 | +Power_Mgmt_A: BLK/BRK_POWER_REQ MAPPING TABLE |
| 95 | +} |
| 96 | +state FW_Version_Region { |
| 97 | +FW_VERSION: FW_VERSION_0 |
| 98 | +FW_VERSION: FW_VERSION_1 |
| 99 | +FW_VERSION: FW_VERSION_2 |
| 100 | +FW_VERSION: FW_VERSION_3 |
| 101 | +FW_VERSION: RSVD |
| 102 | +FW_VERSION: PowerBase |
| 103 | +FW_VERSION: PowerBase_HIGH |
| 104 | +FW_VERSION: LPM_Data_OFFSET |
| 105 | +FW_VERSION: OEM_SOC_DATA_PACKAGE_VERSION_0 |
| 106 | +FW_VERSION: OEM_SOC_DATA_PACKAGE_VERSION_1 |
| 107 | +FW_VERSION: OEM_SOC_DATA_PACKAGE_VERSION_2 |
| 108 | +FW_VERSION: OEM_CHIPSETINIT_VERSION_0 |
| 109 | +FW_VERSION: OEM_CHIPSETINIT_VERSION_1 |
| 110 | +FW_VERSION: OEM_CHIPSETINIT_VERSION_2 |
| 111 | +FW_VERSION: VENDOR_SOC_DATA_PACKAGE_VERSION_0 |
| 112 | +FW_VERSION: VENDOR_SOC_DATA_PACKAGE_VERSION_1 |
| 113 | +FW_VERSION: VENDOR_SOC_DATA_PACKAGE_VERSION_2 |
| 114 | +FW_VERSION: VENDOR_CHIPSETINIT_VERSION_0 |
| 115 | +FW_VERSION: VENDOR_CHIPSETINIT_VERSION_1 |
| 116 | +FW_VERSION: VENDOR_CHIPSETINIT_VERSION_2 |
| 117 | +FW_VERSION: RSVD |
| 118 | +FW_VERSION: RSVD |
| 119 | +FW_VERSION: RSVD |
| 120 | +FW_VERSION: RSVD |
| 121 | +FW_VERSION: System_SharedMemory_Bar |
| 122 | +FW_VERSION: System_SharedMemory_Bar_HIGH |
| 123 | +FW_VERSION: RSVD |
| 124 | +FW_VERSION: RSVD |
| 125 | +FW_VERSION: RSVD |
| 126 | +FW_VERSION: System_SharedMemory_DeviceID |
| 127 | +} |
| 128 | +} |
| 129 | +} |
| 130 | +Entry0 --> FW_VERSION: BASE_OFFSET |
| 131 | +Entry1 --> Power_Mgmt_A: BASE_OFFSET |
| 132 | +Entry10 --> Status_A: BASE_OFFSET |
| 133 | +Entry11 --> Status_B: BASE_OFFSET |
| 134 | +Config1 --> Data_Discovery_Table_Memory: OFFSET = 0x4000h |
| 135 | +Config2 --> Data_Discovery_Table_PowerBase: OFFSET = 0x4100h |
| 136 | +@enduml |
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