MiMo CPU model release for students at Computer Organization course
- MiMo model (v1) is the same as for 2023/24/25 (v05a)
- Advanced pipelined MiMo model v2 is added with more details
+ new student contributions added
+ more docs about MiMo V2 added
can be seen on https://lapsylab.github.io/MiMo_Student_Release/
There is quite common error when MiMo model is opened by various versions of Logisim Evolution environment. Therefore, if model appears as not working, please check all connections first. Most common place for error is output D from RAM that is interrupted and not connected to Data Bus. Maybe some other errors might appear, but as a future engineer you have tools to check, discover and solve problems. If you need help, don't hesitate to contact us.d
- model is the same as for 2023/24 (v05a)
+ new student contributions added
- mimo_v05a_OR_EVO.circ
- New MiMo model (v05a) for this and upcoming years
- Rearrangement of flags in Control Unit (norz instead of corz)
- New MiMo model (v05a) for this and upcoming years
+ micro-assembler update v2 (Bugfix+norz instead of corz)
+ previous versions moved to Archive folder
+ student contributions added (Timer/Counter, PIO Controller)
-
mimo_v04b_OR.circ
- model in Logisim 2.7.1 used in previous years
-
mimo_v04b_OR_EVO.circ
- model in Logisim EVO used in previous years
-
mimo_v05_OR_EVO.circ
- New MiMo model (v05) for this and upcoming years
+ migration to Logisim Evolution (newer Logisim version)
+ previous versions for 2.7.1 kept just in case
+ student contributions added
- work in progress
- bug in microassembler (if-then)
- corz, or n flag (in original MiMo model)
+ Testna vezja added