bump aiter to 859e56f98 for gfx1201/gfx1200 FP8 support#186
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Motivation
This PR addresses the FP8 architecture gate for RDNA4 (
gfx1200/gfx1201) in the AMD Triton flash-attention path.Currently, FP8 support can be blocked by the architecture support table even when running on an FP8-capable RDNA4 platform. This PR updates the bundled
aitersubmodule to a newer revision that includes RDNA4 FP8 architecture support.Related issue:
Technical Details
This PR bumps the
third_party/aitersubmodule:The newer
aiterrevision includes RDNA4 FP8 support forgfx1200/gfx1201, including updates to the FP8 architecture capability checks used by the AMD Triton flash-attention path.The nested CK submodule under
aiteris also updated through theaitersubmodule state:This PR is intentionally limited to the
aitersubmodule bump. It does not directly modify flash-attention kernels or change the AMD Triton FA2 direct-FP8 tensor path.Note:
Direct FP8 tensors through
flash_attn_funccurrently hit the AMD Triton FA2 interface, which raisesNotImplementedErrorfor FP8 tensors. The validated FP8 path in this PR is the AITER FA3 FP8 path.Test Plan
Tested locally on
gfx1201with:The following checks were run:
Build flash-attention with the updated
aitersubmodule.Verify the FP8 architecture gate:
Run FP16 forward smoke test using
flash_attn_func.Run FP16 backward smoke test using
flash_attn_func.Run AITER FA3 FP8 forward numerical correctness check against an FP32 reference attention implementation.
The FP8 numerical check covers:
Test Result
All local validation checks passed on
gfx1201.Summary:
FP8 numerical accuracy versus FP32 reference:
Submission Checklist