feat: GF-T exp2 primitive + 4-neuron layer + AX7203 classifier synth runbook (Refs #1764)

.trinity/seals/ternary_GftExp2.json

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+{
+  "gen_hash_c": "sha256:4622b231fae99d22258e7f918ffba79d6536a3f9cfc84be4893be06683ed046f",
+  "gen_hash_rust": "sha256:3ad0d2798dd31b1f2237ccf4d8e9bb58f98568f6aca15d8a70154eda53e089c9",
+  "gen_hash_verilog": "sha256:01824789d4eb57b9bea30b6e740dd785429487973e21aea9bd7d8f974d4ae908",
+  "gen_hash_zig": "sha256:86ba88aa4c6d45064d01d183a682f5a75bf59c7e1c6831fc09a0fe6f9ce4582d",
+  "module": "GftExp2",
+  "ring": 12,
+  "sealed_at": "2026-08-06T16:24:43Z",
+  "spec_hash": "sha256:52849a662623d3213c2b5f2c397c84a8f75045b867bb210ca9f322a4527d30f4",
+  "spec_path": "specs/ternary/gft_exp2.t27"
+}

.trinity/seals/ternary_GftLayer4.json

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+{
+  "gen_hash_c": "sha256:9bf0c0acfa30c4015949c67d9941253db0bd67b7f02be99c62b8ff0d8e11d159",
+  "gen_hash_rust": "sha256:a6a71ad96385715538578c4bf47745459718194dc3201cc96dcb0aa0ceedd09d",
+  "gen_hash_verilog": "sha256:4329ebd770dae1cb20139e795371e43b07b6a7494fa0626f954a4927c7cfb661",
+  "gen_hash_zig": "sha256:0faf6c887362433f449fbb8ece58c1ab881fe120664641ccf844e753e0e12bcf",
+  "module": "GftLayer4",
+  "ring": 12,
+  "sealed_at": "2026-08-06T16:24:43Z",
+  "spec_hash": "sha256:b47247ab396672cad9a48e3429ab1ebb09a9b729e0ea8a7a761505b56914d456",
+  "spec_path": "specs/ternary/gft_layer4.t27"
+}

.trinity/seals/ternary_GftRecip.json

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+{
+  "gen_hash_c": "sha256:0d3f730a503ad68b663b25c169f5ac98021918c50148556af410eba34ae15080",
+  "gen_hash_rust": "sha256:5d4388dfab08026b34849e8367916d69571cf0dfe989d0d21cf71c64d0ffe62f",
+  "gen_hash_verilog": "sha256:61ae0eefef219c08ae8f1eef692e6d0fef2a37117cd303b819d84b378557ec92",
+  "gen_hash_zig": "sha256:e0ec5bac7a5f1f6569509b5869fdc8ce47be0e885d971d70f25a2d5444749fa7",
+  "module": "GftRecip",
+  "ring": 12,
+  "sealed_at": "2026-08-06T16:37:21Z",
+  "spec_hash": "sha256:29996bb0f8c54f920745ae5b4990af7c35d7d88513b9682b4f59a30bb342ba31",
+  "spec_path": "specs/ternary/gft_recip.t27"
+}

.trinity/seals/ternary_GftSoftmax4.json

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+{
+  "gen_hash_c": "sha256:f7a75ffa403fe0cad383dc525ad321e8bc0eba1a4c1644afe4f0e16a2e2277af",
+  "gen_hash_rust": "sha256:9123d46a1037c9c4a731d18fb893a318d40874e533073e5423a1dba037ca19ff",
+  "gen_hash_verilog": "sha256:f3a3f96ebc601543d7357e8d8ddf719c170fb5022ed95dec174aa1324a372af8",
+  "gen_hash_zig": "sha256:50bd63072a2bf4d6ca27d413afbc08298be4b9bdf7cab039c90d275f795a2693",
+  "module": "GftSoftmax4",
+  "ring": 12,
+  "sealed_at": "2026-08-06T16:37:21Z",
+  "spec_hash": "sha256:8f1855265b9a598a2d50973226ebf78aa05d96c0a03d5873bf1391e54a2137d2",
+  "spec_path": "specs/ternary/gft_softmax4.t27"
+}

bootstrap/tests/gft_exp2.rs

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+// ============================================================================
+// Check for the spec-first GF-T exp2 primitive (specs/ternary/gft_exp2.t27):
+// 2^x for a signed GF-T16 input, result a positive GF-T16. The missing building
+// block for a GF-T softmax. Bit-exact to the committed integer oracle over 606
+// vectors (tests/gft_exp2_vectors.txt); the oracle is itself <=1 ULP vs the true
+// round_to_GFT(2^x) (measured in the prototype).
+// ============================================================================
+
+use std::env;
+use std::fs;
+use std::path::PathBuf;
+use std::process::Command;
+
+fn t27c() -> &'static str { env!("CARGO_BIN_EXE_t27c") }
+fn spec_path() -> PathBuf {
+    PathBuf::from(env!("CARGO_MANIFEST_DIR")).join("..").join("specs").join("ternary").join("gft_exp2.t27")
+}
+fn vectors_path() -> PathBuf {
+    PathBuf::from(env!("CARGO_MANIFEST_DIR")).join("tests").join("gft_exp2_vectors.txt")
+}
+fn tool_available(t: &str) -> bool {
+    Command::new(t).arg("-V").output().map(|o| o.status.success()).unwrap_or(false)
+}
+
+#[test]
+fn spec_first_gft_exp2_matches_oracle() {
+    let gen = Command::new(t27c()).arg("gen-verilog").arg(spec_path()).output().expect("gen-verilog");
+    assert!(gen.status.success(), "gen-verilog failed:\n{}", String::from_utf8_lossy(&gen.stderr));
+    let v = String::from_utf8_lossy(&gen.stdout).into_owned();
+    assert!(
+        v.contains("input  wire [31:0] x") && v.contains("output wire [31:0] result"),
+        "exp2 missing x -> result interface:\n{}", v
+    );
+
+    if !tool_available("iverilog") || !tool_available("vvp") {
+        eprintln!("SKIP: iverilog/vvp not on PATH; skipping exp2 check");
+        return;
+    }
+
+    let vectors = fs::read_to_string(vectors_path()).expect("read vectors");
+    let n = vectors.lines().filter(|l| !l.trim().is_empty()).count();
+    let dir = env::temp_dir().join(format!("t27_exp2_{}", std::process::id()));
+    let _ = fs::remove_dir_all(&dir);
+    fs::create_dir_all(&dir).unwrap();
+    fs::write(dir.join("spec.v"), &gen.stdout).unwrap();
+    fs::write(dir.join("vec.txt"), &vectors).unwrap();
+
+    let tb = format!(
+        r#"`timescale 1ns/1ps
+module tb;
+  reg [31:0] x; wire [31:0] y; integer fails,nn,fd,code; reg [31:0] exp;
+  GftExp2 dut(.clk(1'b0),.rst_n(1'b1),.en(1'b1),.x(x),.ready(),.result(y));
+  initial begin
+    fails=0; nn=0; fd=$fopen("{}","r");
+    while(!$feof(fd)) begin code=$fscanf(fd,"%h %h\n",x,exp);
+      if(code==2) begin #1; nn=nn+1;
+        if(y!==exp) begin fails=fails+1; if(fails<=6)$display("FAIL x=%h y=%h exp=%h",x,y,exp); end
+      end end
+    $fclose(fd);
+    if(fails==0)$display("ALL_PASS %0d",nn); else $display("FAILED %0d/%0d",fails,nn);
+    $finish;
+  end
+endmodule
+"#,
+        dir.join("vec.txt").to_str().unwrap()
+    );
+    fs::write(dir.join("tb.v"), tb).unwrap();
+
+    let vvp = dir.join("sim.vvp");
+    let compile = Command::new("iverilog").args(["-g2012", "-o", vvp.to_str().unwrap()])
+        .arg(dir.join("spec.v")).arg(dir.join("tb.v")).output().unwrap();
+    assert!(compile.status.success(), "iverilog compile failed:\n{}", String::from_utf8_lossy(&compile.stderr));
+    let run = Command::new("vvp").arg(&vvp).output().unwrap();
+    let stdout = String::from_utf8_lossy(&run.stdout).into_owned();
+    let _ = fs::remove_dir_all(&dir);
+    assert!(stdout.contains(&format!("ALL_PASS {}", n)), "exp2 differs from the oracle:\n{}", stdout);
+    assert!(!stdout.contains("FAIL"), "exp2 mismatch:\n{}", stdout);
+}