while: the step became the body, in four backends

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NotebookLM Gate on: push

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NotebookLM Auto-Sync on: pull_request 2

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Seal Staleness Warning on: pull_request 1

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Bootstrap Test Ratchet on: pull_request 2

test-ratchet

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Emit Bit-Exact Gate (CI-02) on: pull_request 1

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Verilog widths (absurd-width ledger)

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FPGA E2E Build on: pull_request 6

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Corpus Ratchet on: pull_request 1

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Withdrawn Number Gate on: pull_request 1

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