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@arichardson arichardson commented Nov 17, 2025

Also fix the missing space in the error message. I notice while changing
RISC-V's loads and stores to use RegClassByHwMode and got a non-descriptive
error from T.getRegisterClass(OpRC) when parsing the InstAliases.

Created using spr 1.3.8-beta.1
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llvmbot commented Nov 17, 2025

@llvm/pr-subscribers-tablegen

Author: Alexander Richardson (arichardson)

Changes

Also fix the missing space in the error message. I notice while changing
RISC-V's loads and stores to use RegClassByHwMode and got a non-descriptive
error when tablegen was parsing the InstAliases.


Full diff: https://github.com/llvm/llvm-project/pull/168444.diff

1 Files Affected:

  • (modified) llvm/utils/TableGen/Common/CodeGenInstAlias.cpp (+3-2)
diff --git a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
index 6c1a3e9977c28..2de27986fa04a 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
@@ -55,9 +55,10 @@ static Expected<ResultOperand> matchSimpleOperand(const Init *Arg,
       // Match 'RegClass:$name' or 'RegOp:$name'.
       if (const Record *ArgRC = T.getInitValueAsRegClassLike(Arg)) {
         if (ArgRC->isSubClassOf("RegisterClass")) {
-          if (!T.getRegisterClass(OpRC).hasSubClass(&T.getRegisterClass(ArgRC)))
+          if (!OpRC->isSubClassOf("RegisterClass") ||
+              !T.getRegisterClass(OpRC).hasSubClass(&T.getRegisterClass(ArgRC)))
             return createStringError(
-                "argument register class" + ArgRC->getName() +
+                "argument register class " + ArgRC->getName() +
                 " is not a subclass of operand register class " +
                 OpRC->getName());
           if (!ArgName)

@@ -55,9 +55,10 @@ static Expected<ResultOperand> matchSimpleOperand(const Init *Arg,
// Match 'RegClass:$name' or 'RegOp:$name'.
if (const Record *ArgRC = T.getInitValueAsRegClassLike(Arg)) {
if (ArgRC->isSubClassOf("RegisterClass")) {
if (!T.getRegisterClass(OpRC).hasSubClass(&T.getRegisterClass(ArgRC)))
if (!OpRC->isSubClassOf("RegisterClass") ||
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Maybe instead if (OpRC->isSubclassOf("RegClassByHwMode")) then report "HwMode support is not implemented"?

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Yeah that would give slightly better results but may be too restrictive. It does seem to work with HWModes as long as the RegClassByHwMode argument is the same, but it doesn't handle the subset case.

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I have some follow-up changes to improve this (printing essentially what you suggested) including a test.

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🐧 Linux x64 Test Results

  • 186255 tests passed
  • 4852 tests skipped

arichardson added a commit to arichardson/upstream-llvm-project that referenced this pull request Dec 2, 2025
…Class

Also fix the missing space in the error message. I notice while changing
RISC-V's loads and stores to use RegClassByHwMode and got a non-descriptive
error from `T.getRegisterClass(OpRC)` when parsing the InstAliases.

Pull Request: llvm#168444
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arichardson commented Dec 5, 2025

Better error message and test added in follow-up change #170790. This should hopefully address the comment. I could merge the two into one commit, but if you are okay with me landing this one first I would prefer that since it's a bit simpler on my side.

@arichardson arichardson merged commit 69721ac into main Dec 5, 2025
12 checks passed
@arichardson arichardson deleted the users/arichardson/spr/tablegen-report-a-better-error-when-an-instalias-does-not-use-a-regclass branch December 5, 2025 17:22
llvm-sync bot pushed a commit to arm/arm-toolchain that referenced this pull request Dec 5, 2025
…t use a RegClass

Also fix the missing space in the error message. I notice while changing
RISC-V's loads and stores to use RegClassByHwMode and got a non-descriptive
error from `T.getRegisterClass(OpRC)` when parsing the InstAliases.

Reviewed By: arsenm

Pull Request: llvm/llvm-project#168444
honeygoyal pushed a commit to honeygoyal/llvm-project that referenced this pull request Dec 9, 2025
…Class

Also fix the missing space in the error message. I notice while changing
RISC-V's loads and stores to use RegClassByHwMode and got a non-descriptive
error from `T.getRegisterClass(OpRC)` when parsing the InstAliases.

Reviewed By: arsenm

Pull Request: llvm#168444
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5 participants