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This milestone targets functional readiness for Earlgrey top-level version 1.0.0. The implementation will be integrated into the `earlgrey_1.0.0` and `master` branches, leading to the first stable release of the Earlgrey design. The QEMU Ealrgrey release will enable integrators to thoroughly test their software stacks, encompassing both functional and integration aspects, by utilizing most of the chip's features. ### Sign-off Criteria OpenTitan QEMU execution environment is able to: 1. Boot `ROM_EXT` with test firmware. ### Limitations This release does not support normal and deep sleep modes of operation. In addition to this, hardware countermeasures and other hardware infrastructure not visible to software has been de-prioritized. ### Missing Functionality The following blocks are not implemented: * `pattgen` * `adc_ctrl` * `pwm` The following blocks have missing features: * `uart` * RX timeout control * TX override * RX line breaks * alerts and interrupt test registers * `flash_ctrl` * Macro functionality such as program repair and high endurance. * ECC/ICVs and scrambling, including single bit ECC error support * Alert emulation * Erase suspend * `keymgr` * Identity output box. Should not impact attestation as the software implementation is using the output box. * `kmac` * Hardware entropy consumption * `aes` * Differences in `edn` integration. Should not impact software development. * `sram_ctrl` * Scrambling reseed * Scrambling algorithm does not match silicon implementation. This is not visible from software. * SRAM execution disable \- i.e. SRAM code execution is always possible * `aon_timer` * Pause in sleep * Pause during escalation * `alert_handler` * Ping mechanisms and timeouts * `pinmux` * sleep related features (e.g. wake-up) * `sensor_ctrl` * IO power ready signal * Alert test registers * `clkmgr` * Clock gating * Clock jitter * `rstmgr` * CPU info dumps * `pwrmgr` * Software cannot hint that WFI should enter sleep mode * Wake-up configuration, interrupts and wake-up reason * Clock settings
Due by November 25, 2025•11/11 issues closed- No due date•1/14 issues closed
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Silicon validation: - SV3 test plan executed. - P0 and P1 issues triaged for workarounds and/or PROD changes. - Silicon validation final sign-off.
No due date•57/68 issues closedSamples distribution / smoke tests: - SV2 test cases executed. - P0 and P1 issues triaged for workarounds and/or PROD changes. - Sign-off for next test phase.
No due date•19/19 issues closedTest plan complete: - Test plans for all blocks reviewed and available in hjson format in opentitan/master branch. - Build system and test infrastructure design approved by TLs and sent to TC for comments. - GitHub issues filed for all required work with initial rough bottom up estimates. Tests implemented: - P0 and P1 test cases implemented and tested on the FPGA. - P0 and P1 categorization determined by triaging against readiness for next milestones. - P0 and P1 build and test infrastructure implemented.
No due date•20/20 issues closed- Due by November 24, 2023•15/15 issues closed
- Due by August 4, 2023•11/11 issues closed
> startdate 2023-05-01
Due by June 23, 2023•138/138 issues closed- Due by May 12, 2023•60/60 issues closed
- Due by November 17, 2023•13/13 issues closed
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> startdate 2023-02-01
Due by June 24, 2023•184/184 issues closedExit Criteria: - All IP blocks at D3 - All IP blocks at V3
No due date•239/242 issues closedExit Criteria: - All IP blocks in D2/D2S - All IP blocks passing V2/V2S - Mask ROM end-end DV test - Chip level passing V2
Due by November 28, 2022•970/971 issues closed- No due date•17/17 issues closed
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> startdate 2021-11-29
Due by December 13, 2021•15/15 issues closed> startdate 2021-11-15
Due by November 29, 2021•3/3 issues closed> startdate 2021-11-01
Due by November 15, 2021•1/1 issues closed> startdate 2021-10-18
Due by November 1, 2021•10/10 issues closed> startdate 2021-10-04
Due by October 18, 2021•6/6 issues closedROM MVP status.
Due by November 1, 2021•8/8 issues closed> startdate 2021-09-20
Due by October 4, 2021•8/8 issues closed> startdate 2021-09-06
Due by September 20, 2021•6/6 issues closed> startdate 2021-08-23
Due by September 6, 2021•6/6 issues closed> startdate 2021-08-09
Due by August 23, 2021•2/2 issues closed> startdate 2021-07-26
Due by August 9, 2021•1/1 issues closed> startdate 2021-07-12
Due by July 26, 2021•6/6 issues closed> startdate 2021-06-14 (4 week sprint due to holiday season)
Due by July 12, 2021•8/8 issues closed> startdate 2021-06-01
Due by June 14, 2021•2/2 issues closed> startdate 2021-05-17
Due by June 1, 2021•3/3 issues closed> startdate 2021-05-04
Due by May 17, 2021•3/3 issues closed> startdate 2021-04-19
Due by May 4, 2021•7/7 issues closed> startdate 2021-04-06
Due by April 19, 2021•5/5 issues closed> startdate 2021-03-22
Due by April 6, 2021•4/4 issues closed> startdate 2021-03-08
Due by March 22, 2021•4/4 issues closed> startdate 2021-02-22
Due by March 8, 2021•4/4 issues closed> startdate 2021-02-08
Due by February 22, 2021•2/2 issues closed