Remove mistyped entries

[amno1]

Hi guys, I hope I am not misunderstanding this, but seems to me like those four instructions:

VRNDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16
VRNDSCALEPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 08 /r ib ] AVX512VL,AVX512FP16
VRNDSCALEPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 08 /r ib ] AVX512FP16

VRNDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib ] AVX512FP16

are mistyped and repeated under VENDSCALEPH and VENDSCALESH entries.

I have looked in SDM Vol 2 which contains all instruction references but I can't find anything named VENDSCALE* (I am using text extracted version I can grep over). The same for the ISA extensions and future sets. I did a web search for those two to check if they are part of some AMD extension, but we search returns nothing, and neither Gemini nor DS can find any reference to those two instructions either. I use both yours x86 instructions table, and also llvm-tblgen to extract avx512 instructions and cross reference to generate instructions for sbcl backend, so these are in yours list but not in llvm, so I had to check them up.

I hope I am not wrong, if I am, sorry for the noise.
best regards

[LinuxCoder13]

Yea, you can face magic tricks such as "pseudo-instructions", like in this example:

; These are officially documented as VMOVDQA, but VMOVQQA seems more logical to me...
VMOVQQA		ymmreg,ymmrm256			[rm:	vex.256.66.0f 6f /r]			AVX,SANDYBRIDGE
VMOVQQA		ymmrm256,ymmreg			[mr:	vex.256.66.0f 7f /r]			AVX,SANDYBRIDGE
VMOVDQA		ymmreg,ymmrm256			[rm:	vex.256.66.0f 6f /r]			AVX,SANDYBRIDGE
VMOVDQA		ymmrm256,ymmreg			[mr:	vex.256.66.0f 7f /r]			AVX,SANDYBRIDGE
VMOVDQU		xmmreg,xmmrm128			[rm:	vex.128.f3.0f 6f /r]			AVX,SANDYBRIDGE
VMOVDQU		xmmrm128,xmmreg			[mr:	vex.128.f3.0f 7f /r]			AVX,SANDYBRIDGE
; These are officially documented as VMOVDQU, but VMOVQQU seems more logical to me...
VMOVQQU		ymmreg,ymmrm256			[rm:	vex.256.f3.0f 6f /r]			AVX,SANDYBRIDGE
VMOVQQU		ymmrm256,ymmreg			[mr:	vex.256.f3.0f 7f /r]			AVX,SANDYBRIDGE

[amno1]

Sure, but those you mention are documented. There are both pseudo instructions and aliases, but these four instructions are not documented as such and honestly don't seem like such either. Also, if that was intentional, I would expect to see all 12 of vrndscale* flavors as vendscale* too, but there are not. And the funny thing is that 'e' is next to 'r' on the keyboard :).

So somebody types:

VENDSCALEPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 08 /r ib] AVX512FP16,AVX512VL, and than copy it three times. Than they copied that and just changed part in [] or typed:

VENDSCALESH xmmreg|mask|z,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.np.0f3a.w0 0a /r ib] AVX512FP16

Perhaps they did more edits, undo something, redo something, went furhter on, and discovered later they miss VRNDSCALE* and re-typed them correctly again later :) Of course, I don't know, just speculating. It is not a terrible bug, rather a cosmetic thing, so this is more like a bug repport than a real PR.