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6 changes: 4 additions & 2 deletions docs/user/FlowVariables.md
Original file line number Diff line number Diff line change
Expand Up @@ -140,6 +140,7 @@ configuration file.
| <a name="DISABLE_VIA_GEN"></a>DISABLE_VIA_GEN| Passed as -disable_via_gen to detailed_route.| |
| <a name="DONT_BUFFER_PORTS"></a>DONT_BUFFER_PORTS| Do not buffer input/output ports during floorplanning.| 0|
| <a name="DONT_USE_CELLS"></a>DONT_USE_CELLS| Dont use cells eases pin access in detailed routing.| |
| <a name="DPL_USE_OLD_DIAMOND"></a>DPL_USE_OLD_DIAMOND| Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.| 0|
| <a name="DPO_MAX_DISPLACEMENT"></a>DPO_MAX_DISPLACEMENT| Specifies how far an instance can be moved when optimizing.| 5 1|
| <a name="EARLY_SIZING_CAP_RATIO"></a>EARLY_SIZING_CAP_RATIO| Ratio between the input pin capacitance and the output pin load during initial gate sizing.| |
| <a name="ENABLE_DPO"></a>ENABLE_DPO| Enable detail placement with improve_placement feature.| 1|
Expand Down Expand Up @@ -321,7 +322,6 @@ configuration file.
| <a name="TNS_END_PERCENT"></a>TNS_END_PERCENT| Default TNS_END_PERCENT value for post CTS timing repair. Try fixing all violating endpoints by default (reduce to 5% for runtime). Specifies how many percent of violating paths to fix [0-100]. Worst path will always be fixed.| 100|
| <a name="UNSET_ABC9_BOX_CELLS"></a>UNSET_ABC9_BOX_CELLS| List of cells to unset the abc9_box attribute on| |
| <a name="USE_FILL"></a>USE_FILL| Whether to perform metal density filling.| 0|
| <a name="USE_NEGOTIATION"></a>USE_NEGOTIATION| Enable using negotiation legalizer for detailed placement.| 0|
| <a name="VERILOG_DEFINES"></a>VERILOG_DEFINES| Preprocessor defines passed to the language frontend. Example: `-D HPDCACHE_ASSERT_OFF`| |
| <a name="VERILOG_FILES"></a>VERILOG_FILES| The path to the design Verilog/SystemVerilog files providing a description of modules.| |
| <a name="VERILOG_INCLUDE_DIRS"></a>VERILOG_INCLUDE_DIRS| Specifies the include directories for the Verilog input files.| |
Expand Down Expand Up @@ -462,6 +462,7 @@ configuration file.
- [CLUSTER_FLOPS_ARGS](#CLUSTER_FLOPS_ARGS)
- [DETAIL_PLACEMENT_ARGS](#DETAIL_PLACEMENT_ARGS)
- [DONT_BUFFER_PORTS](#DONT_BUFFER_PORTS)
- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [EARLY_SIZING_CAP_RATIO](#EARLY_SIZING_CAP_RATIO)
- [FLOORPLAN_DEF](#FLOORPLAN_DEF)
- [GLOBAL_PLACEMENT_ARGS](#GLOBAL_PLACEMENT_ARGS)
Expand Down Expand Up @@ -507,6 +508,7 @@ configuration file.
- [CTS_SNAPSHOT](#CTS_SNAPSHOT)
- [CTS_SNAPSHOTS](#CTS_SNAPSHOTS)
- [DETAILED_METRICS](#DETAILED_METRICS)
- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
- [LEC_AUX_VERILOG_FILES](#LEC_AUX_VERILOG_FILES)
- [LEC_CHECK](#LEC_CHECK)
Expand All @@ -531,6 +533,7 @@ configuration file.

- [CELL_PAD_IN_SITES_DETAIL_PLACEMENT](#CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
- [DETAILED_METRICS](#DETAILED_METRICS)
- [DPL_USE_OLD_DIAMOND](#DPL_USE_OLD_DIAMOND)
- [ENABLE_RESISTANCE_AWARE](#ENABLE_RESISTANCE_AWARE)
- [GLOBAL_ROUTE_ARGS](#GLOBAL_ROUTE_ARGS)
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
Expand Down Expand Up @@ -660,5 +663,4 @@ configuration file.
- [TAP_CELL_NAME](#TAP_CELL_NAME)
- [TECH_LEF](#TECH_LEF)
- [USE_FILL](#USE_FILL)
- [USE_NEGOTIATION](#USE_NEGOTIATION)

2 changes: 1 addition & 1 deletion flow/designs/nangate45/swerv/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@ export PLATFORM = nangate45
export VERILOG_FILES = $(DESIGN_HOME)/src/$(DESIGN_NAME)/swerv_wrapper.sv2v.v
export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/constraint.sdc

export CORE_UTILIZATION = 65
export CORE_UTILIZATION = 64
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 5

Expand Down
2 changes: 1 addition & 1 deletion flow/designs/sky130hd/aes/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.

export PLACE_PINS_ARGS = -min_distance 4 -min_distance_in_tracks

export CORE_UTILIZATION = 35
export CORE_UTILIZATION = 34
export CORE_ASPECT_RATIO = 1
export CORE_MARGIN = 2

Expand Down
2 changes: 1 addition & 1 deletion flow/designs/sky130hd/gcd/config.mk
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.
# Adders degrade GCD
export ADDER_MAP_FILE :=

export CORE_UTILIZATION = 40
export CORE_UTILIZATION = 39
export TNS_END_PERCENT = 100
export SWAP_ARITH_OPERATORS = 1
export OPENROAD_HIERARCHICAL = 1
2 changes: 1 addition & 1 deletion flow/scripts/cts.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ set_placement_padding -global \
-right $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT)

set dpl_args {}
append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
set result [catch { log_cmd detailed_placement {*}$dpl_args } msg]
if { $result != 0 } {
save_progress 4_1_error
Expand Down
2 changes: 1 addition & 1 deletion flow/scripts/detail_place.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ proc do_dpl { } {
-left $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT) \
-right $::env(CELL_PAD_IN_SITES_DETAIL_PLACEMENT)
set dpl_args [env_var_or_empty DETAIL_PLACEMENT_ARGS]
append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
log_cmd detailed_placement {*}$dpl_args

if { $::env(ENABLE_DPO) } {
Expand Down
2 changes: 1 addition & 1 deletion flow/scripts/global_route.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ proc global_route_helper { } {
# Running DPL to fix overlapped instances
# Run to get modified net by DPL
set dpl_args {}
append_env_var dpl_args USE_NEGOTIATION -use_negotiation 0
append_env_var dpl_args DPL_USE_OLD_DIAMOND -use_old_diamond 0
log_cmd global_route -start_incremental
log_cmd detailed_placement {*}$dpl_args
# Route only the modified net by DPL
Expand Down
13 changes: 9 additions & 4 deletions flow/scripts/variables.json

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8 changes: 6 additions & 2 deletions flow/scripts/variables.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -622,10 +622,14 @@ DPO_MAX_DISPLACEMENT:
description: |
Specifies how far an instance can be moved when optimizing.
default: 5 1
USE_NEGOTIATION:
DPL_USE_OLD_DIAMOND:
description: |
Enable using negotiation legalizer for detailed placement.
Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.
default: 0
Comment on lines +625 to 628
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medium

To maintain consistency with variables.json and other documented variables, consider adding the stages field here as well.

DPL_USE_OLD_DIAMOND:
  description: |
    Use the former diamond search legalizer for detailed placement instead of the default negotiation legalizer.
  default: 0
  stages:
    - place
    - cts
    - grt

stages:
- place
- cts
- grt
GPL_TIMING_DRIVEN:
description: |
Specifies whether the placer should use timing driven placement.
Expand Down
2 changes: 1 addition & 1 deletion tools/OpenROAD
Submodule OpenROAD updated 399 files